Via-programmable expanded universal logic gate in MCML for structured ASIC applications: Circuit design

Elizabeth Brauer, I. Hatirnaz, S. Badel, Y. Leblebici

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Citations (Scopus)

Abstract

This paper presents a via-programmable expanded universal logic gate in MOS Current-Mode Logic which can implement any 3-input Boolean function, and a significant subset of 4-input and 5-input functions. The universal logic gate is programmed with the first via mask, while Metal3 and higher levels are used for cell-to-cell interconnections. Thus the cell is suitable for a structured ASIC design methodology. The circuit was used to create a functional cell library which can implement a wide range of functions. The cells are simulated to characterize delays, and a design strategy is proposed for large scale integration.

Original languageEnglish (US)
Title of host publicationProceedings - IEEE International Symposium on Circuits and Systems
Pages2893-2896
Number of pages4
StatePublished - 2006
EventISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems - Kos, Greece
Duration: May 21 2006May 24 2006

Other

OtherISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems
CountryGreece
CityKos
Period5/21/065/24/06

Fingerprint

Logic gates
Application specific integrated circuits
LSI circuits
Boolean functions
Networks (circuits)
Set theory
Masks

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

Brauer, E., Hatirnaz, I., Badel, S., & Leblebici, Y. (2006). Via-programmable expanded universal logic gate in MCML for structured ASIC applications: Circuit design. In Proceedings - IEEE International Symposium on Circuits and Systems (pp. 2893-2896). [1693229]

Via-programmable expanded universal logic gate in MCML for structured ASIC applications : Circuit design. / Brauer, Elizabeth; Hatirnaz, I.; Badel, S.; Leblebici, Y.

Proceedings - IEEE International Symposium on Circuits and Systems. 2006. p. 2893-2896 1693229.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Brauer, E, Hatirnaz, I, Badel, S & Leblebici, Y 2006, Via-programmable expanded universal logic gate in MCML for structured ASIC applications: Circuit design. in Proceedings - IEEE International Symposium on Circuits and Systems., 1693229, pp. 2893-2896, ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, Kos, Greece, 5/21/06.
Brauer E, Hatirnaz I, Badel S, Leblebici Y. Via-programmable expanded universal logic gate in MCML for structured ASIC applications: Circuit design. In Proceedings - IEEE International Symposium on Circuits and Systems. 2006. p. 2893-2896. 1693229
Brauer, Elizabeth ; Hatirnaz, I. ; Badel, S. ; Leblebici, Y. / Via-programmable expanded universal logic gate in MCML for structured ASIC applications : Circuit design. Proceedings - IEEE International Symposium on Circuits and Systems. 2006. pp. 2893-2896
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