Via-programmable expanded universal logic gate in MCML for structured ASIC applications: Circuit design

Elizabeth J. Brauer, I. Hatirnaz, S. Badel, Y. Leblebici

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Scopus citations

Abstract

This paper presents a via-programmable expanded universal logic gate in MOS Current-Mode Logic which can implement any 3-input Boolean function, and a significant subset of 4-input and 5-input functions. The universal logic gate is programmed with the first via mask, while Metal3 and higher levels are used for cell-to-cell interconnections. Thus the cell is suitable for a structured ASIC design methodology. The circuit was used to create a functional cell library which can implement a wide range of functions. The cells are simulated to characterize delays, and a design strategy is proposed for large scale integration.

Original languageEnglish (US)
Title of host publicationISCAS 2006
Subtitle of host publication2006 IEEE International Symposium on Circuits and Systems, Proceedings
Pages2893-2896
Number of pages4
StatePublished - Dec 1 2006
EventISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems - Kos, Greece
Duration: May 21 2006May 24 2006

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)0271-4310

Other

OtherISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems
CountryGreece
CityKos
Period5/21/065/24/06

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ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Cite this

Brauer, E. J., Hatirnaz, I., Badel, S., & Leblebici, Y. (2006). Via-programmable expanded universal logic gate in MCML for structured ASIC applications: Circuit design. In ISCAS 2006: 2006 IEEE International Symposium on Circuits and Systems, Proceedings (pp. 2893-2896). [1693229] (Proceedings - IEEE International Symposium on Circuits and Systems).