Simulation of a 915 MHz receiver using the HP advanced design system

E. Benabe, A. Kuppusamy, T. Weller, Paul G Flikkema, L. Dunleavy

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

The simulation of a 915 MHz receiver using Hewlett Packard's Advanced Design System¿ CAE software is presented in this paper. The receiver subsystem includes input filtering and amplification, and a single down-conversion stage to a 70 MHz IF frequency. In order to demonstrate some capabilities of the software, examples of power budget, small-signal sweep, large signal sweep and harmonic balance simulations are described in a tutorial fashion.

Original languageEnglish (US)
Title of host publication52nd ARFTG Conference Digest-Fall
Subtitle of host publicationComputer-Aided Design and Test for High-Speed Electronics, ARFTG 1998
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages28-38
Number of pages11
ISBN (Electronic)0780356861, 9780780356863
DOIs
StatePublished - Jan 1 1998
Externally publishedYes
Event52nd ARFTG Conference Digest-Fall, ARFTG 1998 - Rohnert Park, United States
Duration: Dec 3 1998Dec 4 1998

Other

Other52nd ARFTG Conference Digest-Fall, ARFTG 1998
CountryUnited States
CityRohnert Park
Period12/3/9812/4/98

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ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Computer Networks and Communications
  • Instrumentation

Cite this

Benabe, E., Kuppusamy, A., Weller, T., Flikkema, P. G., & Dunleavy, L. (1998). Simulation of a 915 MHz receiver using the HP advanced design system. In 52nd ARFTG Conference Digest-Fall: Computer-Aided Design and Test for High-Speed Electronics, ARFTG 1998 (pp. 28-38). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ARFTG.1998.327313