Improving the power-delay product in SCL circuits using source follower output stage

Armin Tajalli; Frank K. Gurkaynak; Yusuf Leblebici; Massimo Alioto; Elizabeth J. Brauer

doi:10.1109/ISCAS.2008.4541375

Improving the power-delay product in SCL circuits using source follower output stage

Armin Tajalli, Frank K. Gurkaynak, Yusuf Leblebici, Massimo Alioto, Elizabeth J. Brauer

Electrical Engineering and Computer Science

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

8 Scopus citations

Abstract

This article explores the effect of using source follower buffers (SFB) at the output of source coupled logic (SCL) circuits. This technique can help to improve the power-delay product (PDP) of an SCL gate approximately by a factor of two. The proposed approach has been applied to improve the PDP in sub-threshold SCL circuits that have been developed for ultra-low power applications. Designed in conventional digital 0.18μm CMOS technology, the proposed SCL gate utilizing SFB at the output achieves a PDP of 0.5fJ/fF/gate while the gate draws 10nA from a 0.6V supply voltage.

Original language	English (US)
Title of host publication	2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
Pages	145-148
Number of pages	4
DOIs	https://doi.org/10.1109/ISCAS.2008.4541375
State	Published - Sep 19 2008
Event	2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008 - Seattle, WA, United States Duration: May 18 2008 → May 21 2008

Publication series

Name	Proceedings - IEEE International Symposium on Circuits and Systems
ISSN (Print)	0271-4310

Other

Other	2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
Country	United States
City	Seattle, WA
Period	5/18/08 → 5/21/08

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ASJC Scopus subject areas

Electrical and Electronic Engineering

Cite this

Tajalli, A., Gurkaynak, F. K., Leblebici, Y., Alioto, M., & Brauer, E. J. (2008). Improving the power-delay product in SCL circuits using source follower output stage. In 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008 (pp. 145-148). [4541375] (Proceedings - IEEE International Symposium on Circuits and Systems). https://doi.org/10.1109/ISCAS.2008.4541375

Improving the power-delay product in SCL circuits using source follower output stage. / Tajalli, Armin; Gurkaynak, Frank K.; Leblebici, Yusuf; Alioto, Massimo; Brauer, Elizabeth J.

2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008. 2008. p. 145-148 4541375 (Proceedings - IEEE International Symposium on Circuits and Systems).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Tajalli, A, Gurkaynak, FK, Leblebici, Y, Alioto, M & Brauer, EJ 2008, Improving the power-delay product in SCL circuits using source follower output stage. in 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008., 4541375, Proceedings - IEEE International Symposium on Circuits and Systems, pp. 145-148, 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008, Seattle, WA, United States, 5/18/08. https://doi.org/10.1109/ISCAS.2008.4541375

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Access to Document

10.1109/ISCAS.2008.4541375