Improved analytic method to calculate emitter follower delay including emitter resistance

Research output: Contribution to conferencePaper

Abstract

As bipolar transistor size decreases, emitter resistance becomes increasingly important in estimating transient delay. We use a quasi-linear large-signal bipolar junction transistor model and linear trial functions in coupled node equations to calculate delay of emitter followers including the effect of emitter resistance. When compared to SPICE simulations, our method produces accurate low-to-high delays for a factor of 10 increase in emitter resistance.

Original languageEnglish (US)
Pages309-312
Number of pages4
StatePublished - Dec 1 1996
EventProceedings of the 1996 IEEE 39th Midwest Symposium on Circuits & Systems. Part 3 (of 3) - Ames, IA, USA
Duration: Aug 18 1996Aug 21 1996

Other

OtherProceedings of the 1996 IEEE 39th Midwest Symposium on Circuits & Systems. Part 3 (of 3)
CityAmes, IA, USA
Period8/18/968/21/96

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ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

Cite this

Brauer, E. J. (1996). Improved analytic method to calculate emitter follower delay including emitter resistance. 309-312. Paper presented at Proceedings of the 1996 IEEE 39th Midwest Symposium on Circuits & Systems. Part 3 (of 3), Ames, IA, USA, .