Implementation of structured ASIC fabric using via-programmable differential MCML cells

Stéphane Badel, Ilhan Hatirnaz, Yusuf Leblebici, Elizabeth J. Brauer

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

This paper presents a regular layout fabric made of via-programmable MCML universal logic cells for structured ASIC applications and the associated design flow. The proposed structured ASIC fabric offers very high noise immunity due to the differential operation, as well as low production cost due to the via-programmable properties of the universal logic cell. Implementations of a number of circuits are presented and the area/speed performances are compared with classical CMOS implementation using a commercial standard cell library in 0.18 μm CMOS technology.

Original languageEnglish (US)
Title of host publicationIFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip
Pages234-238
Number of pages5
DOIs
StatePublished - Dec 1 2006
EventIFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip, VLSI-SoIC 2006 - Nice, France
Duration: Oct 16 2006Oct 18 2006

Publication series

NameIFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip

Other

OtherIFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip, VLSI-SoIC 2006
CountryFrance
CityNice
Period10/16/0610/18/06

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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    Badel, S., Hatirnaz, I., Leblebici, Y., & Brauer, E. J. (2006). Implementation of structured ASIC fabric using via-programmable differential MCML cells. In IFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip (pp. 234-238). [4107635] (IFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip). https://doi.org/10.1109/VLSISOC.2006.313239