Abstract
This brief examines different parity-check node decoding algorithms for low-density parity-check (LDPC) codes, seeking to recoup the performance loss incurred by the min-sum approximation compared to sum-product decoding. Two degree-matched check node decoding approximations that depend on the check node degree dc are presented. Both have low complexity and can be applied to any degree distribution. Simulation results show near sum-product decoding performance for both degree-matched check node approximations for regular and irregular LDPCs.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 1054-1058 |
| Number of pages | 5 |
| Journal | IEEE Transactions on Circuits and Systems II: Express Briefs |
| Volume | 53 |
| Issue number | 10 |
| DOIs | |
| State | Published - Oct 2006 |
| Externally published | Yes |
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Keywords
- Iterative decoding
- LDPC codes
- Reduced-complexity decoding
ASJC Scopus subject areas
- Signal Processing
- Electrical and Electronic Engineering
Cite this
Degree-matched check node decoding for regular and irregular LDPCs. / Howard, Sheryl L; Schlegel, Christian; Gaudet, Vincent C.
In: IEEE Transactions on Circuits and Systems II: Express Briefs, Vol. 53, No. 10, 10.2006, p. 1054-1058.Research output: Contribution to journal › Article
}
TY - JOUR
T1 - Degree-matched check node decoding for regular and irregular LDPCs
AU - Howard, Sheryl L
AU - Schlegel, Christian
AU - Gaudet, Vincent C.
PY - 2006/10
Y1 - 2006/10
N2 - This brief examines different parity-check node decoding algorithms for low-density parity-check (LDPC) codes, seeking to recoup the performance loss incurred by the min-sum approximation compared to sum-product decoding. Two degree-matched check node decoding approximations that depend on the check node degree dc are presented. Both have low complexity and can be applied to any degree distribution. Simulation results show near sum-product decoding performance for both degree-matched check node approximations for regular and irregular LDPCs.
AB - This brief examines different parity-check node decoding algorithms for low-density parity-check (LDPC) codes, seeking to recoup the performance loss incurred by the min-sum approximation compared to sum-product decoding. Two degree-matched check node decoding approximations that depend on the check node degree dc are presented. Both have low complexity and can be applied to any degree distribution. Simulation results show near sum-product decoding performance for both degree-matched check node approximations for regular and irregular LDPCs.
KW - Iterative decoding
KW - LDPC codes
KW - Reduced-complexity decoding
UR - http://www.scopus.com/inward/record.url?scp=33750591782&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=33750591782&partnerID=8YFLogxK
U2 - 10.1109/TCSII.2006.882204
DO - 10.1109/TCSII.2006.882204
M3 - Article
AN - SCOPUS:33750591782
VL - 53
SP - 1054
EP - 1058
JO - IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing
JF - IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing
SN - 1057-7130
IS - 10
ER -