• 289 Citations
  • 8 h-Index
19922011

Research output per year

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Research Output

  • 289 Citations
  • 8 h-Index
  • 14 Conference contribution
  • 8 Article
  • 6 Paper
  • 6 Conference article
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Article
2011
2009

Ultra-low power 32-bit pipelined adder using subthreshold source-coupled logic with 5 fJ/stage PDP

Tajalli, A., Brauer, E. J. & Leblebici, Y., Jun 1 2009, In : Microelectronics Journal. 40, 6, p. 973-978 6 p.

Research output: Contribution to journalArticle

8 Scopus citations
2008

Implementing ultra-high-value floating tunable CMOS resistors

Tajalli, A., Leblebici, Y. & Brauer, E. J., Mar 7 2008, In : Electronics Letters. 44, 5, p. 349-351 3 p.

Research output: Contribution to journalArticle

62 Scopus citations

Subthreshold source-coupled logic circuits for ultra-low-power applications

Tajalli, A., Brauer, E. J., Leblebici, Y. & Vittoz, E., Jul 1 2008, In : IEEE Journal of Solid-State Circuits. 43, 7, p. 1699-1710 12 p., 4550646.

Research output: Contribution to journalArticle

77 Scopus citations
2007

Ultra-low power subthreshold current-mode logic utilising PMOS load device

Tajalli, A., Vittoz, E., Leblebici, Y. & Brauer, E. J., Aug 24 2007, In : Electronics Letters. 43, 17, p. 911-913 3 p.

Research output: Contribution to journalArticle

16 Scopus citations
2001

Real-time interaction between a neuromorphic electronic circuit and the spinal cord

Jung, R., Brauer, E. J. & Abbas, J. J., Sep 27 2001, In : IEEE Transactions on Neural Systems and Rehabilitation Engineering. 9, 3, p. 319-326 8 p.

Research output: Contribution to journalArticle

47 Scopus citations
1998

Additive decomposition applied to the semiconductor drift-diffusion model

Brauer, E. J., Turowski, M. & Mcdonough, J. M., Jan 1 1998, In : VLSI Design. 8, 1-4, p. 393-399 7 p.

Research output: Contribution to journalArticle

Open Access
1995