• 286 Citations
  • 8 h-Index
19922011
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Research Output 1992 2011

  • 286 Citations
  • 8 h-Index
  • 25 Conference contribution
  • 9 Article
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Article
2011
Electric network analysis
Students
Electrical engineering
Drawing (graphics)
Operational amplifiers
2009
Coupled circuits
Logic circuits
Logic
Logic gates
Low Voltage
8 Citations (Scopus)

Ultra-low power 32-bit pipelined adder using subthreshold source-coupled logic with 5 fJ/stage PDP

Tajalli, A., Brauer, E. & Leblebici, Y., Jun 2009, In : Microelectronics Journal. 40, 6, p. 973-978 6 p.

Research output: Contribution to journalArticle

Logic gates
Adders
logic
Logic circuits
products
2008
60 Citations (Scopus)

Implementing ultra-high-value floating tunable CMOS resistors

Tajalli, A., Leblebici, Y. & Brauer, E., 2008, In : Electronics Letters. 44, 5, p. 349-351 3 p.

Research output: Contribution to journalArticle

Cutoff frequency
Resistors
77 Citations (Scopus)

Subthreshold source-coupled logic circuits for ultra-low-power applications

Tajalli, A., Brauer, E., Leblebici, Y. & Vittoz, E., Jul 2008, In : IEEE Journal of Solid-State Circuits. 43, 7, p. 1699-1710 12 p., 4550646.

Research output: Contribution to journalArticle

Coupled circuits
Bias currents
Logic circuits
Electric network topology
Logic gates
2007
16 Citations (Scopus)

Ultra-low power subthreshold current-mode logic utilising PMOS load device

Tajalli, A., Vittoz, E., Leblebici, Y. & Brauer, E., 2007, In : Electronics Letters. 43, 17, p. 911-913 3 p.

Research output: Contribution to journalArticle

Bias currents
Logic circuits
2001
47 Citations (Scopus)

Real-time interaction between a neuromorphic electronic circuit and the spinal cord

Jung, R., Brauer, E. & Abbas, J. J., 2001, In : IEEE Transactions on Neural Systems and Rehabilitation Engineering. 9, 3, p. 319-326 8 p.

Research output: Contribution to journalArticle

Spinal Cord
Lampreys
Networks (circuits)
VLSI circuits
Neurology
1998

Additive decomposition applied to the semiconductor drift-diffusion model

Brauer, E., Turowski, M. & Mcdonough, J. M., 1998, In : VLSI Design. 8, 1-4, p. 393-399 7 p.

Research output: Contribution to journalArticle

Semiconductor materials
Decomposition
Semiconductor devices
Computational efficiency
Navier Stokes equations
1995
Emitter coupled logic circuits
Transistors
Bipolar transistors
Electric potential
Voltage regulators