• 286 Citations
  • 8 h-Index
19922011
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Research Output 1992 2011

  • 286 Citations
  • 8 h-Index
  • 25 Conference contribution
  • 9 Article
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Conference contribution
2008
8 Citations (Scopus)

Improving the power-delay product in SCL circuits using source follower output stage

Tajalli, A., Gurkaynak, F. K., Leblebici, Y., Alioto, M. & Brauer, E., 2008, Proceedings - IEEE International Symposium on Circuits and Systems. p. 145-148 4 p. 4541375

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Coupled circuits
Logic gates
Logic circuits
Buffers
Electric potential
2007
21 Citations (Scopus)

Ultra low power subthreshold MOS current mode logic circuits using a novel load device concept

Tajalli, A., Vittoz, E., Leblebici, Y. & Brauer, E. J., 2007, ESSCIRC 2007 - Proceedings of the 33rd European Solid-State Circuits Conference. p. 304-307 4 p. 4430304

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Bias currents
Logic circuits
Triodes
Networks (circuits)
2006

Implementation of structured ASIC fabric using via-programmable differential MCML cells

Badel, S., Hatirnaz, I., Leblebici, Y. & Brauer, E., 2006, IFIP VLSI-SoIC 2006 - IFIP WG 10.5 International Conference on Very Large Scale Integration and System-on-Chip. p. 234-238 5 p. 4107635

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Application specific integrated circuits
Networks (circuits)
Costs
5 Citations (Scopus)

Via-programmable expanded universal logic gate in MCML for structured ASIC applications: Circuit design

Brauer, E., Hatirnaz, I., Badel, S. & Leblebici, Y., 2006, Proceedings - IEEE International Symposium on Circuits and Systems. p. 2893-2896 4 p. 1693229

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Logic gates
Application specific integrated circuits
LSI circuits
Boolean functions
Networks (circuits)
3 Citations (Scopus)

Via-programmable structured ASIC fabric based on MCML cells: Design flow and implementation

Badel, S., Hatirnaz, I., Leblebici, Y. & Brauer, E., 2006, Midwest Symposium on Circuits and Systems. Vol. 1. p. 85-88 4 p. 4267078

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Application specific integrated circuits
Networks (circuits)
Costs
2004

Finding efficient inductor geometries in digital CMOS process for RF applications

Brauer, E. & Magoon, V., 2004, Proceedings of the IASTED International Conference on Circuits, Signals, and Systems. Rashid, M. H. (ed.). p. 558-561 4 p. 449-048

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Inductance
Genetic algorithms
Specifications
Geometry
Metals
1 Citation (Scopus)

Low noise MCML prefix adders using 0.18 μm CMOS technology

Brauer, E. & Leblebici, Y., 2004, Proceedings of the IASTED International Conference on Circuits, Signals, and Systems. Rashid, M. H. (ed.). p. 467-470 4 p. 449-103

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Adders
Fans
Networks (circuits)
33 Citations (Scopus)

Performance evaluation of CMOS low drop-out voltage regulators

Tantawy, R. & Brauer, E., 2004, Midwest Symposium on Circuits and Systems. Vol. 1.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Voltage regulators
Transient analysis
2 Citations (Scopus)

Sub-70 PS full adder in 0.18 μm CMOS current-mode logic

Brauer, E. & Leblebici, Y., 2004, Proceedings of the IASTED International Conference on Circuits, Signals, and Systems. Rashid, M. H. (ed.). p. 482-486 5 p. 449-101

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Adders
Networks (circuits)
2002

Determining the network parameters of the amphibian vision system

Brauer, E. & Nishikawa, K. C., 2002, Midwest Symposium on Circuits and Systems. Vol. 1.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Neurons
Simulators
Genetic algorithms
1999

Analog VLSI-spinal cord interface for motor control

Jung, R., Brauer, E. J., Abbas, J. J. & Grandhe, S., 1999, Annual International Conference of the IEEE Engineering in Medicine and Biology - Proceedings. IEEE, Vol. 1. p. 488 1 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Networks (circuits)
Mathematical models
Biological systems
Neural networks
Control systems

Experimental results of 6 neuron VLSI circuit of lamprey unit pattern generator

Brauer, E., Jung, R., Abbas, J. J., Thompsen, B., Hilchie, S. & Tran, A., 1999, Annual International Conference of the IEEE Engineering in Medicine and Biology - Proceedings. IEEE, Vol. 1. p. 372 1 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

VLSI circuits
Neurons
Networks (circuits)
Fish
Swimming

Graphical user interface for functional neuromuscular stimulation system

Brauer, E., Colvin, J. & Abbas, J. J., 1999, Midwest Symposium on Circuits and Systems. IEEE, Vol. 2. p. 1105-1108 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Graphical user interfaces
Neural networks
Field programmable gate arrays (FPGA)
1 Citation (Scopus)

Hardware implementation of a neural network pattern shaper algorithm

Brauer, E., Abbas, J. J., Callaway, B., Colvin, J. & Farris, J., 1999, Proceedings of the International Joint Conference on Neural Networks. IEEE, Vol. 4. p. 2315-2318 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Neural networks
Hardware
Muscle
Field programmable gate arrays (FPGA)
Logic circuits

Neuromorphic a VLSI circuit of lamprey unit pattern generator

Brauer, E., Thompsen, B., Jung, R. & Abbas, J. J., 1999, Midwest Symposium on Circuits and Systems. IEEE, Vol. 2. p. 1095-1098 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

VLSI circuits
Fish
Neurons
Numerical models
Networks (circuits)

VLSI circuit of lamprey unit pattern generator

Brauer, E., Jung, R., Thompsen, B. & Abbas, J. J., 1999, Proceedings of the International Joint Conference on Neural Networks. IEEE, Vol. 4. p. 2319-2322 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

VLSI circuits
CMOS integrated circuits
Networks (circuits)
Neurology
Neurons
1997
2 Citations (Scopus)

Analog circuit model of lamprey unit pattern generator

Brauer, E., Jung, R., Wilson, D. & Abbas, J. J., 1997, Proceedings of the IEEE Great Lakes Symposium on VLSI. Anon (ed.). IEEE, p. 137-142 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Analog circuits
Networks (circuits)
Neurons
Neural networks
Swimming
1 Citation (Scopus)

Full-swing bootstrapped BiCMOS buffer

Brauer, E. & Elamanchili, P., 1997, Proceedings of the IEEE Great Lakes Symposium on VLSI. Anon (ed.). IEEE, p. 8-13 6 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Networks (circuits)
Energy dissipation
Bipolar transistors
Electric potential
MOSFET devices
1 Citation (Scopus)

Sensitivity analysis of an analog circuit model of Lamprey unit pattern generator

Brauer, E., Jung, R., Wilson, D. & Abbas, J. J., 1997, IEEE International Conference on Neural Networks - Conference Proceedings. IEEE, Vol. 2. p. 975-979 5 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Analog circuits
Sensitivity analysis
Networks (circuits)
Neurons
Mathematical models
1996

Improved analytic method to calculate emitter follower delay including emitter resistance

Brauer, E., 1996, Midwest Symposium on Circuits and Systems. Cameron, G., Hassoun, M., Jerdee, A. & Melvin, C. (eds.). IEEE, Vol. 1. p. 309-312 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Bipolar transistors
SPICE
1995

Analytic method to calculate emitter follower delay using trial functions in coupled node equations

Brauer, E. & Kang, S. M., 1995, Proceedings - IEEE International Symposium on Circuits and Systems. Anon (ed.). IEEE, Vol. 3. p. 1580-1583 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Bipolar transistors
Fans
Capacitance

Estimating node voltages in bipolar circuits using linear programming

Brauer, E. & Kang, S. M., 1995, Proceedings - IEEE International Symposium on Circuits and Systems. Anon (ed.). IEEE, Vol. 2. p. 901-903 3 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Linear programming
Networks (circuits)
Electric potential
1993

Analytic method for calculating current sharing in emitter-coupled bipolar transistors

Brauer, E. & Kang, S. M., 1993, Midwest Symposium on Circuits and Systems. Publ by IEEE, Vol. 2. p. 887-890 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Bipolar transistors
Transistors

Functional verification of ECL circuits including voltage regulators

Brauer, E. & Kang, S. M., 1993, Proceedings - IEEE International Symposium on Circuits and Systems. Publ by IEEE, Vol. 3. p. 1710-1713 4 p.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Emitter coupled logic circuits
Voltage regulators
Transistors
Networks (circuits)
Electric potential
1992

An algorithm for identifying voltage regulators in ECL circuits

Brauer, E. & Hajj, I. N., Jan 1 1992, 1992 IEEE International Symposium on Circuits and Systems, ISCAS 1992. Institute of Electrical and Electronics Engineers Inc., p. 2101-2103 3 p. 230579. (Proceedings - IEEE International Symposium on Circuits and Systems; vol. 5).

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Emitter coupled logic circuits
Voltage regulators
Networks (circuits)
Transistors
Simulators